TIEplus – A Virtual Prototyping Student Contest focused on Printed Circuit Board Design

The NAFEMS Eastern European 2020 Virtual Conference took place on the 23rd and 24th of September 2020. The event gave participants access to high level presentations in the field of structural mechanics, computational fluid dynamics, electromagnetics and discrete element methods.

Resource Abstract

As a response to the highly increasing market demand for Printed Circuit Board design professionals to have also expertise in fields like signal integrity, thermal management and EMC, the TIE committees has decided to add a “plus” to the traditional TIE contest byincorporating also the area of virtual prototyping. This is how the TIEplus concept was born in 2015, as a step towards the introduction of EM simulation of electrical interconnects for electronic assemblies to the already well-established TIE student competition.

The goal of TIEplus is to promote virtual prototyping disciplines among universities and R&D centers by involving students (bachelor, master, PhD) in workshops and presentations from

simulation software vendors and industry experts, as a preparation for the contest.

The contest is based on an online platform where all the modeling information is provided; the contestants have two weeks to create the model and simulate the interconnect according the requirements. At the end of this period they will present the simulation results to

the evaluation committee.



For the past four editions, the focus was on the simulation of high-speed interconnect

with data rates raging from 100Mbps to 5 Gbps. The upcoming editions will also incorporate

elements of thermal analysis and CFD simulations.